DIGITAL LOGIC AND COMPUTER SYSTEMS ORGANIZATION (JNTU) 1SEM

2010 MCA 1 SEM QUESTION PAPER(JNTUK REGULAR) 

Time: 3 Hours Max Marks: 60

Answer any FIVE questions All questions carry EQUAL marks



1. a) Represent the number (+ 46.5) as a floating point binary number with 24 bits. The

normalized fraction mantissa has 16 bits and exponent has 8 bits.

b) Simplify the Boolean function F together with the don’t care condition d in product of

sums form

F (w,x,y,z) = (0,1,2,3,7,8,10)

d (w,x,y,z) = (5,6,11,15)



2. a) What is full adder ? Design a full adder circuit by constructing truth table.

b) What is excitation table .Explain about JK flip flop with its excitation table.



3. a) With a block diagram of associative memory explain in detail about hardware

organization.

b) Explain briefly about memory hierarchy.



4. a) Explain different instruction formats in detail.

b) Explain in detail about the generation of physical address.



5. a) Explain about data manipulation instructions with examples.

b) Explain about shift instructions in detail.



6. a) List and explain different conditional branch instructions.

b) Write any two examples for external interrupts and internal interrupts



7. a) What is control memory. Explain micro programmed control organization.

b) Explain difference between hard wired control and micro programmed control.

Is it possible to have a hardwired control associated with a control unit?



8. a) Discuss asynchronous data transfer in detail.

b) Explain DMA transfer in a computer system.

2010 MCA 1 SEM QUESTION PAPER(JNTUK SUPPLY) 

Time: 3 Hours Max Marks: 60

Answer any FIVE questions All questions carry EQUAL marks



1. a) Discuss with truth tables about all logic gates with their graphical symbols.

b) Explain the design procedure for binary counter.



2. a) Design 3-to-8 decoder circuit and also construct its truth table.

b) Discuss bidirectional shift register with parallel load.



3. a) What is the significance of using complement. Explain in detail (r-1)’s

complement and r’s complement with an example.

b) Derive the circuits for 3-bit parity generator and 4-bit parity checker using an odd

parity.



4. a) Discuss in detail about arithmetic micro operations in detail.

b) Explain about arithmetic logic shift unit.



5. a) Explain flowchart for the hardware algorithm for add and subtract operations.

b) Explain multiplication of floating point numbers.



6. a) Explain different addressing modes.

b) Differentiate Micro programmed control Vs Hardwired control



7. a) How memory is connected to CPU .Explain.

b) What is virtual memory? Give relation between address and memory space in Virtual

memory system.



8. a) Explain communication with I/O versus memory bus.

b) Explain asynchronous data transfer