Showing posts with label COMPUTER-ORGANIZATION. Show all posts
Showing posts with label COMPUTER-ORGANIZATION. Show all posts

Combinational circuits(Half Subtracter, Full Subtracter)

                               In Combinational circuits(Half adder, Full adder) post we have seen what are combinational circuits. In this post i am going to discuss about  other two combinational circuits. They are

1)Half subs-tractor

2)Full  subs-tractor



1)Half substractor :

                              It is a combinational circuit which  is used to subs-tract  two binary bits.   In this circuit we have two inputs and two outputs. Let us consider the inputs as x and y   and  the outputs are D and B. Where D refers to different and B refers to borrower.



Truth table:



X      Y        D           B



0      0         0           0
0      1         1           1
1      0         1           0
1      1         0           0


Diagram:




half substracter techaravind
Half 
subs-tractor
2)Full subs-tractor:

               A full subs-tractor is a combinational circuit which is used for to subtract more than two binary bits. It is the combination o the half subs-tractors. It consists of more than two inputs and only two outputs.

Let us consider the inputs are x,y,z and the outputs are D,B.


Truth table:












X         Y         Z        D            B         
0       0000
00111
01011
01101
10010
10100
11000
11111
Diagram:

           




full substracter techaravind
Full 
subs-tractor








Combinational circuits(Half adder, Full adder)

Combinational circuits(Encoder,Decoder)

                   The Encoder and Decoder are different kind of combinational circuits which are used to convert binary information to decimal,octal and hexa decimal and vice-versa.



Decoder:

                A decoder is combinational circuit which is used for to convert n it binary information to 2n unique outputs. so that a decoder circuit is used  for to convert a binary information to decimal,octal and hexa decimal. a decoder circuit is a variable circuit called as nxm decoder.

               Let us consider 2x4 decoder circuits consists of inputs A0 and A1 some time along with Enable E.

The outputs are D0,D1,D2,D3,D4. The inputs are connected to 4  AND gates and derive  Unique outputs. If we have Enable it will come along with input line. This is used to start the process of decoder circuit. Weather is  Zero the inputs representing with xx called don't care conditions.



Diagram & truth table:

decoder techaravind




Encoder:

               An encoder is a combinational circuit which is used to convert 2n inputs to n outputs. so that it is reverse operation of a decoder. it converts the  decimal information to binary.

               In 8x3 encoder circuit consists 8 inputs called D0 to D7 and the outputs  A0,A1,A2 the all the inputs connected to a specified OR gate to representing the binary equavalent of a specifed decimal. The outputs are as follows.



A0=D1+D3+D5+D7

A1=D2+D3+D6+D7

A2=D4+D5+D6+D7

Flip-Flops (SR,D,JK,T flip-flops)

                  The storage elements employed in clocked sequential circuits are called flip-flops, A flipflop is a binary cell capable of storing one bit of information. It has two outputs one for the normal value and one for the complement value of the bit stored in it. A flip- flop maintains a binary state until directed by a clock pulse to switch stare. The difference among various types of flip-flops is in the number of inputs they possess and in the manner in which the inputs affect the binary state.





SR flip-flop:

                   This SR(set or reset) flip-flop has three inputs, labeled S(for set)m R(for reset)m and c(for clock)[ we take c if  it is asynchronous system]. It has one output Q and some times the flip-flop has a complemented output, which is indicated with a small circle at the other output terminal.

                    If  R = S = 1 combination is called a restricted combination or a forbidden state because, as both NOR gates then output zeros, it breaks the logical equation Q = not Q. The combination is also inappropriate in circuits where both inputs may go low simultaneously (i.e. a transition from restricted to keep). The output would lock at either 1 or 0 depending on the propagation time relations between the gates

Observe the following table to under stand input output signals of SR flip-flop.



techaravind flip-flops














SRAction(Q)
00Keep state
01Q = 0
10Q = 1
11Restricted combination




D flip-flop:

            The D(data or delay) flip-flop is a slight modification of the SR flip-flop. An SR flip-flop is converted to a D flip flop by inserting an inverter between S and R and assigning the symbol D to the single input. The D input is  sampled during the occurrence of a clock transition from 0 to 1. if D=1 the output of the flip flop goes to the 1 stare but if D=0 the output of the flip flop goes to the 0 state.




techaravind flip-flops
D filp flop based on SR NAND





techaravind flip-flops
D flip flop based on SR NOR







DInput
EEnable/clock
QOutput
QInverse of Q




JK flip flop:
               A JK flip flop is a refinement of the SR flip flop in that indeterminate condition of the sr type is defined in the JK type. INputs J and K behave like inputs S and R to set and clear the flip-flop tespectively. When inputs J and K are both equal to 1 a clock transition switches the outputs of the flip flop to their complement stare.i.e., change its output to the logical complement of its current value. Setting J = K = 0 does NOT result in a D flip-flop, but rather, will hold the current state. To synthesize a D flip-flop, simply set K equal to the complement of J. The JK flip-flop is therefore a universal flip-flop, because it can be configured to work as an SR flip-flop, a D flip-flop, or a T flip-flop.



techaravind flip-flops
JK flip-flop
T-Flip Flop:

                  Another kind of flip flop is T(toggle) flip flop. This flip flop obtained form a JK type. If you know the jk flip flop it is very simple to know t flip flop. If we connect the J and k inputs in jk flip flop we obtain T flip flop.




techaravind flip-flops
T flip flop




















Advanced Electronics 8

Combinational Circuits(Half adder, Full adder)

           A combinational circuit is a connected arrangement of logic gates with a set of inputs and outputs. At any given time the binary values of outputs are a function of the binary combination of the inputs.

          Now below i will discuss two basic arthamatic circuits. I take these as my example of basic circuits. Before going to in this you need to have  some basic idea about logical gates go to  basic logical gates my previous post.



Half Adder:

            The most basic digital arithmetic circuits is the addition of two binary digits. A combinational circuit that performs the arithmetic addition of tow bits is called a half adder. the input variables of a half adder anre called the augend and addend bits. The output  variables the sum and carry.It is necessary to specify two out put variables because the of 1+1 is binary 10, which has tow digits. We assign symbols x and y to the tow input  variables. The C output is 0 unless both imputs are 1. The S output represents the least significant bitof the sum.



                                                               S=x`y+xy`

                                                               C=xy



Truth table

x       y      C       S

0      0       0       0

0      1       0       1

1      0       0       1

1      1       1       0





Full Adder:

                  A Full-adder is a combinational circuit that forms the arithmetic sum of three input bits. It consists of three inputs and two outputs. Two of the input variables, denoted by A and B, represent the two significant bits to be added. The thired input Cin represents the carry from the previous lower significatn position. Two outputs are necessary because the arithmetic sum o three dinary digits ranges in value from 0 to3, and binary 2 or 3 needs two digits. The two outputs are designated by the symbols S(for sum) and Cout (for carrry). The boolean expression of  Full adder is as follows.



                  
















truth tableInputs




Outputs
ABCinCoutS
00000
10001
01001
11010
00101
10110
01110
11111












Basic Digital Logic Gates & Univercial Gates

                     Digital logic gates, latches,memories,and the other components are used to design computer systems and their sub systems,which includes the central processing unit or microprocessors. A good Under standing of these basics of digital logic gates is necessary in order to learn the fundamentals of computer design. This gates also used to developed the memory units and the combination of different gates forms processing units.





1)AND gate:

                    This gate generally have two inputs and one out put. we denotes (1) as power on (0) as power off(0).   In this gates if both inputs are on then only output is on other wise it is off.





2)OR gate:

                   This gate have two inputs and one output. For this gates at least  one input must be on to get out put as on(1). Remaining all are 0.



3)NOT gate(Inverter):

                   This gate generally know as Inverter. This gates have only one input and one out put. For this gate if input is on(1) output is off(0). And vice versa.





Univercell gates:

                            The logic gates which are used in any circuit family that are  sequential circuit, combinational circuits and integrated circuit and etc.  are called as "univercell gates".



1)NAND gate:

                   This gate is complementary to AND gate. In this kinds of gate if both inputs are on(1) out put is off(0). And reaming all are off(0).



2)NOR gate:

                  This is the complementary gale of  OR gate. For this gate if the both inputs are off(0) then the output is on(1).



3)XOR gate:

                This is another impotent gate. For this gate if both inputs are on(1) or if  both inputs are off(0) then the output is off(0). And the reaming cases the output is on(1).



4)XNOR gate:

                 This gate is complementary to XOR gate. For this gate if both inputs are on(1) or if both inputs are off(0) then the out put is on(1). Other wise off(0)

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